Recently, techniques of rapidly transmitting large amounts of data become important. In contrast to techniques in which a microwave is used in the method of wireless transmission, those which employ a millimeter wave that can handle a wide frequency bandwidth receive attention. A simple enlargement of the frequency bandwidth, and also a shortening of the interval between transmission and reception are essential techniques for increasing the transmission rate.
On the other hand, in a mobile use which is driven by a battery, when a transmission circuit and a reception circuit are continuously operated, the power consumption is large, and the communicable time is limited. Therefore, necessary circuit blocks are time-divisionally operated.
Consequently, a wireless circuit requires high-frequency operation performance, and a current output circuit which biases the wireless circuit requires high-speed switching operation performance. In the WiFi (registered trademark) standard (for example, IEEE 802.11a) in the microwave band which is widely used in wireless LANs, for example, the interframe space SIFS (Short Inter-Frame Space) is 16 μs. By contrast, in the WiGig (registered trademark) (Wireless Gigabit) which is a new standard, and which uses the millimeter wave band, 3 μs is requested.
Hereinafter, a conventional current output circuit which is exemplified in Patent Literature 1 will be described with reference to FIGS. 9 and 10. Patent Literature 1 relates to a light-emitting device drive circuit that is an example of a current output circuit in which the current output can rapidly rise, and that drives a light-emitting device such as a laser diode to write information on a recording medium such as a CD-R or a CD-RW.
FIG. 9 is a circuit diagram showing the configuration of a light-emitting device drive circuit that is a current output circuit of a conventional example. In the light-emitting device drive circuit of FIG. 9, transistors M102, M103 constitute a current mirror circuit, and an input current I1 is produced in a transistor M101 in which the gate is biased by a voltage source VR.
When a switch Q101 is set to a short-circuit state by a pulse generated by a pulse generation circuit 102, the input current I1 flows through the current mirror circuit, a drive current I2 which corresponds to the current mirror ratio is output from the transistor M103, and a light-emitting device D101 emits light. The pulse generation circuit 102 is further connected to the current mirror circuit through a waveform shaping circuit 101 which inverts the waveform, and a capacitor C101. A compensation input current Δi1 which is a differential waveform of the pulse is produced by the waveform shaping circuit 101 and the capacitor C101.
The operation of the current output circuit of the conventional example of FIG. 9 will be described in detail with reference to FIG. 10. FIG. 10 is a view showing waveforms of transient responses of various outputs which are generated in the current output circuit of the conventional example. FIG. 10(a) shows a waveform in the vicinity of the rising of the pulse generated by the pulse generation circuit 102. FIG. 10(b) shows a synthesized waveform of the input current I1, and compensation input current Δi1 which are input to the current mirror circuit. FIG. 10(c) shows a waveform of the drive current (output current) I2 which is output from the current mirror circuit to drive the light-emitting device.
In FIGS. 10(b) and 10(c), three lines are drawn depending on the level of the compensation input current Δi1. The broken line indicates the drive current in the case where Δi1 is zero, the solid line indicates the drive current in the case where Δi1 is optimally adjusted, and the dash-dot line indicates the drive current in the case where Δi1 is excessive.
Before the input pulse supplied from the pulse generation circuit 102 rises, the switch Q101 is open, and therefore the gate voltages of the transistors M102, M103 are approximately equal to the VDD voltage. When the input pulse supplied from the pulse generation circuit 102 rises and the switch Q101 becomes short circuited, the gate voltages of the transistors M102, M103 are lowered, and a current begins to flow. The transistors M102, M103 have a gate capacitance. Therefore, considerable time is required to charge the gate capacitance, and hence the rising waveform of the drive current I2 is rounded.
The compensation input current Δi1 has a function of accelerating the charging time of the gate capacitance. In the case where the compensation input current is optimally adjusted as shown by the solid lines in FIGS. 10(b) and 10(c), the drive current I2 is stabilized to a predetermined current value in a short time period. The compensation input current Δi1 can be adjusted by the capacitance of the capacitor C101.